Dr. Nandakumar Nambath

Educational Qualifications

1. PhD from Electrical Engineering Department, IIT Bombay (2010-2016) Thesis Title: Continuous-Time Adaptive Equalizer for Analog Domain Signal Processing Based Low Power DP-QPSK Receivers Supervisor: Prof. Shalabh Gupta
2. BTech in Electronics and Communication Engineering (2002-2006) Government Engineering College Thrissur, University of Calicut, Kerala

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Areas of Research

Integrated Circuits and Systems, Optimization Techniques for Efficient Design of Analog Integrated Circuits, VLSI for Communication, Coherent Optical Communication Systems.

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Courses Taught

1. EE 101 : Introduction to Electrical and Electronics Engineering
2. EE 232 : Digital Circuits and Lab
3. EE 308 : Communication Systems
4. EE 337 : Microprocessors Lab
5. EE 632 : Analog Integrated Circuit Design
6. EE 634 : Circuits and Systems for Communication
7. EE 638 : System Design with HDL

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Professional Appointments

1. Associate Professor - School of Electrical Sciences, IIT Goa (11/2023 - Present)
2. Assistant Professor - School of Electrical Sciences, IIT Goa (08/2017-11/2023)
3. Project Research Scientist - Electrical Engineering Department, IIT Bombay 03/2016-05/2017)
4. Research Associate - Electrical Engineering Department, IIT Bombay (09/2015-03/2016)
5. Lecturer (Temporary) - Electronics and Communication Engineering Department, GEC Thrissur, Kerala (08/2009-12/2009)
6. Project Engineer - Wipro Technolgies Ltd., Kochi, Kerala (10/2006-07/2009)

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Recent Publications

1. R. Rashid, K. Krishna, C. P. George, and N. Nambath, "Machine Learning Driven Global Optimisation Framework for Analog Circuit Design," Microelectronics Journal, vol. 151, pp. 106362, September 2024
2. K. Krishna and N. Nambath, "High-Speed Cascode Cross-Coupled CMOS Dynamic Comparator with Auxiliary Inverter Pair," Microelectronics Journal, vol. 149, pp. 106239, July 2024
3. R. K. Kottilingal and N. Nambath, "Performance Analysis of Under Water Optical Wireless Video Communication Systems," IEEE International Symposium on Circuits & Systems, Singapore, May 2024
4. K. Krishna and N. Nambath, "Review on High-Speed Dynamic Comparators for Analog to Digital Converters," Journal of Circuits, Systems and Computers, vol. 33, no. 13, pp. 2430006, March 2024
5. R. Rashid, G. Raghunath, V. Badugu, and N. Nambath, "Performance Evaluation of Evolutionary Algorithms for Analog Integrated Circuit Design Optimisation," Microelectronics Journal, vol. 141, pp. 105983, November 2023
6. K. Krishna and N. Nambath, "Cascode Cross-Coupled Stage High-Speed Dynamic Comparator in 65 nm CMOS," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 7, pp. 1083-1086, July 2023
7. K. Krishna, R. Rashid, and N. Nambath, "Triple-Tail Common-Mode Insensitive High-Speed Dynamic Comparator for Analog In-Memory Computing Architectures," IEEE International Symposium on Circuits & Systems, Monterey, USA, May 2023
8. V. Badugu, P. Bhatnagar, J. Girdhar, and N. Nambath, "Adaptive Algorithm Based Sensor-less Dual-Axis Solar Tracking System," IEEE Industrial Electronics and Applications Conference, Virtual, Malaysia, October 2022
9. R. K. Kottilingal and N. Nambath, "Experimental Performance Analysis of Underwater Optical Wireless Communication Systems," IEEE Region 10 Symposium, Mumbai, India, July 2022
10. R. Ashok, N. Nambath, and S. Gupta, "Carrier Phase Recovery and Compensation in Analog Signal Processing Based Coherent Receivers," IEEE/OSA Journal of Lightwave Technology, vol. 40, no. 8, pp. 2341-2347, April 2022
11. R. Rashid and N. Nambath, "Area Optimisation of Two Stage Miller Compensated Op-Amp in 65 nm using Hybrid PSO," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 1, pp. 199-203, January 2022
12. R. Rashid and N. Nambath, "Hybrid Particle Swarm Optimization Algorithm for Area Minimization in 65 nm Technology," IEEE International Symposium on Circuits & Systems, Daegu, Korea, May 2021

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Recognition and Awards

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