Call for Submission
High Performance Computing (HPC) and, in general, Parallel and Distributed Computing (PDC) is ubiquitous. Every computing device, from a smartphone to a supercomputer, relies on
parallel processing. Compute clusters of multicore and manycore processors (CPUs and GPUs) are routinely used in Computer Science and other Engineering and Science domains.
Therefore, it is important for every programmer, software professional and researchers using computing to understand how parallelism and distributed computing affect problem solving.
It is essential for educators to impart a range of PDC and HPC skills and knowledge at multiple levels within the curriculum of computing and related disciplines. Software industry
and research laboratories require people with these skills, more so now. Thus, they now engage in extensive on-the-job training. Additionally, rapid changes in hardware platforms,
languages, and programming environments increasingly challenge educators to decide what to teach and how to teach, in order to prepare students for careers that involve PDC and HPC.
EduHiPC aims to provide a forum that brings together academia, industry, government, and non-profit organizations – especially from India, its vicinity, and Asia – for exploring and
exchanging experiences and ideas about the inclusion of high-performance, parallel, and distributed computing into undergraduate and graduate curriculum of Computer Science, Computer
Engineering, Computational Science, Computational Engineering, and computational courses for STEM and business and other non-STEM disciplines.
The 5th EduHiPC (EduHiPC 2023) workshop invites unpublished manuscripts from academia, industry, and government laboratories on topics pertaining to needs and approaches for
augmenting undergraduate and graduate education in Computer Science and Engineering, Computational Science, and computational courses for both STEM and business disciplines with PDC and
HPC concepts. Additionally, we encourage manuscripts that validate their innovative approaches through the systematic collection and analysis of information to evaluate their performance
and impact. The workshop is particularly dedicated to bringing together stakeholders from industry (hardware vendors, and research and development organizations), government labs, and
academia in the context of HiPC 2023. The goal of the workshop is to hear the challenges faced by educators and professionals, to learn about various approaches to addressing these
challenges, and to have opportunities to exchange ideas and solutions. We also encourage submissions related to the challenges in imparting education during this recent global pandemic
and online evaluation mechanisms for PDC/HPC. This effort is in coordination with the
Center for Parallel and Distributed
Computing Curriculum Development and Educational Resources (CDER).
Topics of interest include, but are not limited to:
SUBMISSION GUIDELINES
Authors should submit papers in PDF format through the submission site
(
https://easychair.org/conferences/?conf=eduhipc23
)
We are accepting submissions for full papers (up to 8 pages
including figures, tables, and references).
Submissions
should be formatted as single-spaced, double-column pages
( IEEE format).
Authors must try to revise their papers to incorporate
feedback from the reviewers. All accepted papers will be
published in the HiPC Workshop Proceedings and will be
included in the IEEE Xplore digital library — every accepted
paper will have at least one author who will register at the
notified registration fee and also present the paper at the
conference. For extraneous circumstances authors may be
allowed to present virtually. Accepted papers will be
available from the CDER website approximately 2 weeks before
the workshop so that attendees can read papers before
attending the talks. Papers that are not accepted as full
papers may be optionally accepted as short poster papers (
2 pages). Authors of papers accepted as poster papers
will be invited to revise their papers in a 2-page format.
Authors of all accepted full and short papers must be
present at the workshop. Authors will be further invited
to publish their work in a
Journal of Parallel and Distributed Computing (JPDC) special issue,
as in the past workshops.
IMPORTANT DATES - EduHiPC Workshop
Abstract Submission Deadline: September 22, 2023 (encouraged)
Paper Submission Deadline: September 30, 2023,
October 14, 2023,
Paper Notification: November 5, 2023
Camera-ready Deadline: November 15, 2023
All deadlines are at 11:59 PM AoE (UTC-12).
Registration Fees for Accepted Papers:
At least one author of an accepted paper must register and present the paper. Any support for
paper registration fees will be communicated to selected papers by the EduHiPC committee.
There will be a three-week long hands-on training workshop on how to integrate parallel and distributed computing (PDC) in undergraduate CS and CE curriculum in online format. One day in-person meeting of the training workshop will occur on December 17 (a day prior to EduHiPC workshop) at the conference venue. The training is targeted for faculty who teach undergraduate CS/CE classes and do not have expertise in PDC. Prior to this workshop a few online training sessions will be conducted in the preceding weeks. The training will be jointly conducted by Scientists from C-DAC and Faculty experts affiliated with CDER center and IIT Goa. C-DAC India will sponsor registration fee for HiPC conference for 40 participants attending the training workshop. Interested faculty are encouraged to apply to participate in the workshop by completing the following application form. https://tntech.co1.qualtrics.com/jfe/form/SV_5cgFoagXCTKzBbw . Further details can be found in https://tcpp.cs.gsu.edu/curriculum/?q=system/files/TrainingWorkshopFlyer2023.pdf .
Registration Link:
https://tntech.co1.qualtrics.com/jfe/form/SV_5cgFoagXCTKzBbw
Registration Last Date: 15 October 2023
Registration may close earlier if seats get filled up.
Travel stipend, if any, to selected participants will be communicated by the EduHiPC committee.
Organizing Committee
Sheikh Ghafoor, Tennessee Tech University, USA
Anshul Gupta, IBM, USA
Ashish Kuvelkar, C-DAC, India
Sushil Prasad, University of Texas, San Antonio, USA
Sharad Sinha, IIT Goa, India
Alan Sussman, National Science Foundation & University of Maryland, USA
Ramachandran Vaidyanathan, Louisiana State University, USA
Charles Weems, University of Massachusetts, USA
Workshop Co-Chairs
Sheikh Ghafoor, Tennessee Tech University, USA,
sghafoor@tntech.edu
Sushil K. Prasad, University of Texas San Antonio, USA,
sushil.prasad@utsa.edu
Program Co-Chairs
Ashish Kuvelkar, C-DAC, India, ashishk@cdac.in
Sharad Sinha, IIT Goa, India, sharad@iitgoa.ac.in
Proceedings Chair
Satish Puri, Missouri University of Science and Technology, USA
Web Master
Buddhi Ashan Mallika Kankanamalage, University of Texas San Antonio, USA
Tentative Program Committee
Joel Adams, Calvin College, USA
Konduri Aditya, IISc Bangalore
Ritu Arora, Wayne State University, USA
Martina Barnas, Indiana University Bloomington, USA
Swarnendu Biswas, IIT Kanpur
David Brown, Elmhurst University, USA
David Bunde, Knox College, USA
Unnikrishnan C, IIT Palakkad
Henry Gabb, Intel, USA
Nasser Giacaman, The University of Auckland, NZ
Vaidyanathan, Louisiana State University, USA
Shiva Gopalakrishnan, IIT Bombay, India
Anshul Gupta, IBM Research, USA
Chitra P., Thiagarajar College of Engineering, India
Devangi Parikh, University of Texas, USA
Dhiraj Patil, IIT Dharwad
Suresh Purini, IIIT Hyderabad
G. Ramakrishna, IIT Tirupati
Mike Rogers, Tennessee Tech University, USA
Somnath Roy, IIT Kharagpur
Subodh Sharma, IIT Delhi, India
Jagpreet Singh, IIIT Allahabad
Alan Sussman, University of Maryland, USA
Shubbi Taneja, Worcester Polytechnique Institute
Ramachandran Vaidyanathan, Louisiana State University, USA
Ramrao Wagh, Goa University
Charles Weems, University of Massachusetts, USA