7th Workshop on Education for High Performance Computing (EduHiPC 2025)

17th December 2025, Hyderabad - India


Call for Papers

High Performance Computing (HPC) and, in general, Parallel and Distributed Computing (PDC) has become pervasive, from supercomputers and server farms containing multicore CPUs and GPUs, to individual PCs, laptops, and mobile devices. Even casual users of computers now depend on parallel processing. Therefore, it is important for every computer user (and especially every programmer) to understand how parallelism and distributed computing affect problem solving. It is essential for educators to impart a range of PDC and HPC knowledge and skills at multiple levels within the educational fabric woven by Computer Science (CS), Computer Engineering (CE), and related computational curricula including data science. Companies and laboratories need people with these skills, and, as a result, they are finding that they must now engage in extensive on-the-job training. Nevertheless, rapid changes in hardware platforms, languages, and programming environments increasingly challenge educators to decide what to teach and how to teach it, in order to prepare students for careers that are increasingly likely to involve PDC and HPC.

EduHiPC aims to provide a forum that brings together academia, industry, government, and non-profit organizations - especially from Indian subcontinent, its vicinity, and Asia - for exploring and exchanging experiences and ideas about the inclusion of high-performance, parallel, and distributed computing into undergraduate and graduate curriculum of Computer Science and Engineering, Computational Science, Computational Engineering, and computational courses for STEM and business and other non-STEM disciplines. The workshop will invite unpublished manuscripts from academia, industry, and government laboratories on topics pertaining to approaches for augmenting undergraduate and graduate education in these disciplines with PDC and HPC concepts.


Topics of interest include, but are not limited to:

  1. Pedagogical issues in incorporating PDC and HPC in undergraduate and graduate education, especially in core courses.
  2. Novel ways of teaching PDC and HPC topics.
  3. Issues and experiences addressing remote synchronous and asynchronous teaching of PDC/HPC during the gone by pandemic situation.
  4. Data science and big data aspects of teaching HPC/PDC, including early experience with data science degree programs.
  5. Evidence-based educational practices for teaching HPC/PDC topics that provide evidence about what works best under what circumstances.
  6. Experience with incorporating PDC and HPC topics into core CS/CE courses and in domains.
  7. Experience and challenges with HPC education in developing countries, especially in India, its vicinity, and Asia.
  8. Computational Science and Engineering courses.
  9. Pedagogical tools, programming environments, infrastructures, languages, and projects for PDC and HPC.
  10. Employers' experiences with new hires and expectation of the level of PDC and HPC proficiency among new graduates.
  11. Education resources based on high-level programming languages and environments such as Chapel, Haskell, Python, Cilk, CUDA, OpenCL, OpenACC, SYCL, oneAPI, Hadoop, and Spark.
  12. Parallel and distributed models of programming and computation suitable for teaching, learning, and workforce development.
  13. Issues and experiences addressing the gender gap in computing and broadening participation underrepresented groups.
  14. Challenges in remote teaching, including those related to meaningful engagement of students and assessment.

EduHiPC is a sister workshop of the Edu* series of workshops EduPar, EduHPC, and Euro-EduPar that are being held in conjunction, respectively, with IPDPS, Supercomputing, and Euro-Par. HiPC is a premium conference on High Performance computing sponsored by IEEE. HiPC encompasses all aspects of HPC such as algorithms, application, architecture etc. except for educational aspects of HPC. EduHiPC workshop will complement and enhance current efforts of HiPC. The workshop is particularly dedicated to bringing together stakeholders from industry (both hardware vendors and employers), government labs, and academia in the context of HiPC-25. The goal is for each to hear the challenges faced by others, to learn about various approaches to addressing these challenges, and to have opportunities to exchange ideas and solutions.


Important Dates

Submission Open: August 15, 2025
Submission Close: September 30, 2025
Review Assignment: October 5, 2025
Review Due: October 25, 2025
Author Notification: October 30, 2025
Camera Ready Paper: November 14, 2025
Workshop Date: December 16, 2025


SUBMISSION GUIDELINES


Authors should submit papers in PDF format through the submission site (To be updated soon.)

We are accepting submissions for full papers (up to 8 pages including figures, tables, and references).
Submissions should be formatted as single-spaced, double-column pages ( IEEE format). Authors must try to revise their papers to incorporate feedback from the reviewers. All accepted papers will be published in the HiPC Workshop Proceedings and will be included in the IEEE Xplore digital library — every accepted paper will have at least one author who will register at the notified registration fee and also present the paper at the conference. For extraneous circumstances authors may be allowed to present virtually. Accepted papers will be available from the CDER website approximately 2 weeks before the workshop so that attendees can read papers before attending the talks. Papers that are not accepted as full papers may be optionally accepted as short poster papers ( 2 pages). Authors of papers accepted as poster papers will be invited to revise their papers in a 2-page format. Authors of all accepted full and short papers must be present at the workshop. Authors will be further invited to publish their work in a Journal of Parallel and Distributed Computing (JPDC) special issue, as in the past workshops.


Organizers


  1. Sushil Prasad, University of San Antonio at San Antonio, sushil.prasad@utsa.edu
  2. Sheikh Ghafoor, Tennessee Tech University, sghafoor@tntech.edu
  3. Alan Sussman, National Science Foundation & University of Maryland, als@cs.umd.edu
  4. Ramachandran Vaidyanathan, Louisiana State University, vaidy@ece.lsu.edu
  5. Anshul Gupta, IBM, anshul@us.ibm.com
  6. Charles Weems, University of Massachusetts, weems@cs.umass.edu
  7. Ashish Kuvelkar, CDAC, India, ashishk@cdac.in
  8. Sharad Sinha, IIT Goa, India, sharad@iitgoa.ac.in


Workshop Co-Chairs


Sushil K. Prasad, University of Texas San Antonio, USA, sushil.prasad@utsa.edu
Ashish Kuvelkar, C-DAC, India, ashishk@cdac.in


Program Co-Chairs


Sharad Sinha, IIT Goa, India, sharad@iitgoa.ac.in
Bangalore Puri


Peachy Assignment Chair


David P. Bunde, Knox College, USA


Web Master and Proceedings Co-Chairs


Buddhi Ashan Mallika Kankanamalage, University of Texas San Antonio, USA


Publicity Chair


Sudhakar Yogaraj, IIT Goa, India


Tentative Program Committee Members


Ramachandran Vaidyanathan, Louisiana State University, USA
Martina Barnas, Indiana University Bloomington, USA
Niloy Ganguly, Indian Institute of Technology Kharagpur, USA India
Nasser Giacaman, The University of Auckland, NZ
Mike Rogers, Tennessee Tech University, USA
Domingo Gimenez, University of Murcia, Spain
Anshul Gupta, IBM Research, USA
Anshul Gupta, IBM Research, USA
Kishore Kothapalli, International Institute of Information Technology, Hyderabad, India
Krishna Kant, Temple University, USA
Seetha Rama Krishna Nookala, Intel, India
Ritu Arora, University of Texas San Antonio, USA
Sukhamay Kundu, Louisiana State University, USA
R. K. Shyamasundar, IIT Bombay Mumbai, India
R. Govindarajan, Indian Institute of Science, India
Andrew Lumsdaine, University of Washington, USA
Manish Parashar, NSF & Rutgers University, USA
Cynthia Phillips, Sandia National Laboratories, USA
Noemi Rodriguez, PUC-Rio, Brazil
Jawwad Shamsi, FAST National University of Computer and Emerging Sciences, Pakistan
Rudrapatna Shyamasundar, Indian Institute of Technology, Mumbai, India
David Brown, Elmhurst College, USA
Chitra P. Thiagarajan College of Engineering, India
Kazi A. Kalpoma, Ahsanullah University of Engineering and Technology, Bangladesh
Somnath Roy, IIT Kharagpur, India
Sudhakar Yogaraj, IIT Goa, India