EE 638 System Design using HDL

  • What are we going to learn?

    • Review of digital logic design fundamentals. Introduction to hardware description languages. Familiarization with programmable logic devices and gate arrays. Design, simulate, and synthesize combinational and sequential building blocks of digital systems using hardware description languages and programmable logic devices and gate arrays. Design of floating point arithmetic circuits. State machine techniques for the design of synchronous and asynchronous sequential circuits. Timing analysis of digital systems. Testing of digital systems and design for testability. Case studies of various digital systems for electrical engineering problems. programmable logic devices. Advanced digital system design topics and applications.

    Which book should we refer to?

    • Charles H. Roth, Jr and Lizy Kurian John, "Digital Systems Design Using VHDL," CENGAGE Learning
      Stephen Brown and Zvonko Vranesic, "Fundamentals of Digital Logic with Verilog Design," Tata McGraw Hill
      Nazeih M.Botros, "HDL Programming VHDL and Verilog," Dreamtech Press
      Perry D. L., "VHDL: Programming by Example," Tata McGraw Hill

    How do we run simulations?

    • We will be using Quartus and Modelsim for VHDL programming and simulation. Installation instructions for Windows systems can be found here and for Ubuntu systems here. Use IIT Goa credentials to download the files.

    Where can we access the course material?

    • We will be using Moodle for course management.

    How are we going to get graded?

    • The final score will have the following weight distribution (tentative). Apart from the listed items, there will be some bonus points too.
    • 20% - Continuous evaluation based on quizzes
      25% - Midsem examination
      25% - Assignments and project
      30% - Endsem examination