EE 635 Digital Integrated Circuit Design

  • What are we going to learn?

    • Review of MOSFETs: structure, operation, IV characteristics. CMOS inverter: properties, static and dynamic behavior, power dissipation, optimum sizing. Combinational Circuits: static and dynamic CMOS circuits, complementary CMOS gates, design of CMOS circuit for Boolean expressions, propagation delay, logical effort, path delay optimization, asymmetric and skewed gates, mirror functions, arithmetic circuits. Sequential circuits: types and timing parameters of memory elements, bistable memory elements, design of memory elements. CMOS families: ratioed logic, differential cascode voltage switch logic, pass transistor logic, dynamic logic, etc.

    Which book should we refer to?

    • Jan M. Rabaey, Anantha P. Chandrakasan, and Borivoje Nikolic, "Digital Integrated Circuits," Englewood Cliffs: Prentice Hall
      Neil Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design," Addison Wesley
      Ivan Sutherland, Robert F. Sproull, David Harris, "Logical Effort: Designing Fast CMOS Circuits," Morgan Kaufmann

    Do we use any simulation tools?

    • We will be using LTspice and Electric for schematic and layout design and simulation. Installation files for Windows systems can be found here. Use IIT Goa credentials to download the files.

    Where can we access the course material?

    • We will be using Moodle for course management. A Telegram channel will be used for announcements. Check your inbox for invites to these.

    How are we going to get graded?

    • The final score will have the following weight distribution (tentative).
    • 30% - Continuous evaluation based on quizzes and assignments
      25% - Midsem examination
      15% - Course project
      30% - Endsem examination